//----------------------- Output Registers, physical pins
#define PORT_BBA15	PORTD, PD4
#define PORT_BBA16	PORTD, PD5
#define PORT_BBA17	PORTD, PD6
#define PORT_BBA18	PORTD, PD7
#define PORT_BBA	PORTD
#define PORT_BBA_SET(ee)	outb( PORT_BBA, (PORT_BBA & 0xF0) | (ee & 0x0F))

#define PORT_ARP	PORTF, PF0
#define PORT_ARB	PORTF, PF1
#define PORT_AWE	PORTF, PF2
#define PORT_AOE	PORTF, PF3
#define PORT_ACE	PORTF, PF4

#define PORT_BNKSEL PORTE, PE2
#define PORT_AUX1	PORTE, PE3
#define PORT_AUX2	PORTE, PE4

#define PORT_AUX3	PORTB, PB5
#define PORT_AUX4	PORTB, PB6
#define PORT_AACOE	PORTB, PB7

#define PORT_CMDOD	PORTG, PG2
#define PORT_CMDOE	PORTG, PG1
#define PORT_CMDEV	PORTG, PG0
#define PORT_AACUP	PORTG, PG3
#define PORT_AACCLR PORTG, PG4

#define PORT_BU1	PORTA
#define PORT_BU2	PORTC

//----------------------- Data Direction Registers
#define DDR_BBA15	DDRD, PD4
#define DDR_BBA16	DDRD, PD5
#define DDR_BBA17	DDRD, PD6
#define DDR_BBA18	DDRD, PD7

#define DDR_ARP		DDRF, PF0
#define DDR_ARB		DDRF, PF1
#define DDR_AWE		DDRF, PF2
#define DDR_AOE		DDRF, PF3
#define DDR_ACE		DDRF, PF4

#define DDR_BNKSEL	DDRE, PE2
#define DDR_AUX1	DDRE, PE3
#define DDR_AUX2	DDRE, PE4

#define DDR_AUX3	DDRB, PB5
#define DDR_AUX4	DDRB, PB6
#define DDR_AACOE	DDRB, PB7

#define DDR_CMDOD	DDRG, PG2
#define DDR_CMDOE	DDRG, PG1
#define DDR_CMDEV	DDRG, PG0
#define DDR_AACUP	DDRG, PG3
#define DDR_AACCLR	DDRG, PG4

#define DDR_BU1		DDRA
#define DDR_BU2		DDRC

//----------------------- Input Registers
#define PIN_BU1		PINA
#define PIN_BU2		PINC
#define PIN_ARB		PINF, PF1
#define PIN_USRSW1	PINB, PB4
#define PIN_USRSW2	PINE, PE5
#define PIN_USRSW3	PINE, PE6
#define PIN_USRSW4	PIND, PD1
#define PIN_USRSW5	PIND, PD0
#define PIN_IGNINT	PINE, PE7

// Flash Memory Restrictions
 #define FLASH_END		0x1FFFFF
//#define FLASH_END		0xFFFFFF

//---------------------- Output Definitions
#define AUX_OUT_12_SET_PWM(x)	timer_initialise_mode(3,x,TIMER_PWMFC)
#define AUX_OUT_1_SET(x)		timer_3_pwm_A_set(x)
#define AUX_OUT_1_SET_VALUE(x)	timer_3_pwm_A_set_value(x)
#define AUX_OUT_1_STATUS		timer_status(3)
#define AUX_OUT_2_SET(x)		timer_3_pwm_B_set(x)
#define AUX_OUT_2_SET_VALUE(x)	timer_3_pwm_B_set_value(x)
#define AUX_OUT_2_STATUS		timer_status(3)

#define AUX_OUT_34_SET_PWM(x)	timer_initialise_mode(1,x,TIMER_PWMFC)
#define AUX_OUT_3_SET			timer_1_pwm_A_set(x)
#define AUX_OUT_3_SET_VALUE		timer_1_pwm_A_set_value(x)
#define AUX_OUT_3_STATUS		timer_status(1)
#define AUX_OUT_4_SET(x)		timer_1_pwm_B_set(x)
#define AUX_OUT_4_SET_VALUE(x)	timer_1_pwm_B_set_value(x)
#define AUX_OUT_4_STATUS		timer_status(1)

#define ADC_MAX				5120
#define ADC_MULT			12.7875
#ifndef ADC_INITIAL_REF
#define ADC_INITIAL_REF INTERNAL_256
#endif
